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45nm Development On Track

Making excellent progress on 45nm

Working with
IBM, we are on track for all internal milestones

Expect production starts in 2008

Technology will use
SOI, building on and extending the success of previous generations

Will continue extensive use of strained silicon techniques to achieve industry leading performance characteristics
05/10/07 AMD showcases 45 nm silicon - TG Daily
According to chief technology officer Phil Hester, the 300 mm wafer code-named “Typhoon”,  shown in public for the first time today, holds 45 nm dies combining SRAM and logic. The executive said that AMD’s 45 nm process is on track and recent notes from Intel that AMD is facing yield issues “are rubbish” and “wishful thinking  on their side”.

Intel pulls 45 nanometre chips into 1H 07 - the inquirer
"In talking with manufacturing people, we've learned this might not be as impossible as it seems. The 45 nanometre process was basically done and set in mid-2006. With the recipe set, it was just a matter of equipping the fabs and getting the tools in place. Shake them down, and hopefully you are in business."

AMD's 45nm Opterons Scheduled for 2008 - Dailytech
"Shanghai is apparently more than just a cache-bump.  AMD's documentation explicitly claims Shanghai will be the company's first 45nm processor.  However, with a die shrink additional cache is one of the immediate architecture options as the smaller node allows for more transistors to fit on the chip die.  Shanghai features 6MB of L3 cache."

45 to 32 nm: Another Evolutionary Transition - Semiconductor International
"Like the 45 nm generation, the 32 nm node will take advantage of the performance tricks of the prior technology generation, including immersion lithography, multiple stressors for mobility enhancement and porous low-k materials in the interconnect. The biggest change at 32 nm will be the introduction of high-k dielectrics and metal gates into production, though different approaches are likely to be taken. Other highlights are copper plugs and 3-D integration. This article will discuss these exceptions to the rule"

IBM, AMD Announces 45nm Chip High-K Gate Process - Dailytech
"Working with AMD and its other development partners including Sony and Toshiba, IBM has found a way to construct a critical part of the transistor with high-k metal gates, that substitutes a new material into a critical portion of the transistor that controls its primary on/off switching function. The material provides superior electrical properties compared to its predecessor, silicon dioxide, enhancing the transistor's function while also reducing leakage"

AMD on track for shift to 45-nano manufacturing - CNET
"The hop to 65 nanometers, however, was relatively easy. 45-nanometer manufacturing will entail several structural changes inside chips. AMD and IBM will also adopt immersion lithography, which involves "drawing" circuits on a chip with a light beam while the silicon wafer is submerged in purfied water. "

Low oxygen copper alloy drives 45 nanometre move - the inquirer
"The copper interconnects are polycrystalline structures with many small grains, and the boundaries are particularly liable to failures. Metal oxide in the copper interconnects are responsible for failures, so NEC in collaboration with the Mirai project, uses a technique to soak up the oxygen atoms."

Intel 'Core' moving to 45 nanometer - ZDNet
"Given the amount of information that has been available, flanking Intel's 65 nm path, and the fact that the Cedar Mill and Presler engineering samples we happened to preview months ago were working smoothly back then already, the 65 nm chapter seems to be something that Intel might already be closing internally, looking ahead to 45 nm. Today, it is all about squeezing the current manufacturing advantage in order to conquer middle earth and lock down brave AMD into its current 90 nm shire - although it is blossoming and as green as it can possibly be"

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