|11/04/06 Innovative Silicon revamps SOI memory, AMD likes it - EETimes
"Innovative Silicon Inc. (ISi), a startup pioneer of "floating-body" memory, has come up with an improved version of the technique that provides a factor of ten improvement in the 1 to 0 margin and the data retention time. Advanced Micro Devices Inc., which took out a license for the previous generation of the Z-RAM in December 2005, has taken a license out for the second generation of the technology. "
07/03/06 SOI sales surge - CEN
"What do Microsoft's Xbox 360 and Sony's PlayStation 3 have in common with the latest multiprocessor servers from IBM , Sun and Dell , and with networking systems used in Mercedes, BMW and other automobiles? All of them use chips made with silicon on insulator (SOI) technology"
03/08/06 Not all CPUs are created equal - the inquirer
"How to find an SSOI manufactured CPU? While AMD isn't declaring what processors are made with the new SSOI technique, one can argue that the certain models of Socket 939 Opteron processors were extremely overclockable and those models were supposed to have SSOI. Remember, all of the processors are coming out from the very same factory where AMD is currently making all of it chips."
01/19/06 AMD licenses Innovative Silicon's SOI memory - EETImes
"The embedded memory is a good fit with AMD, which has moved all its microprocessor production over to SOI manufacturing processes. ISi (Santa Clara, Calif.) has claimed that Z-RAM can achieve five times the density of embedded SRAM, the conventional memory choice for on-chip caches, and twice the density of embedded DRAM. "
10/28/05 The Silicon-on-Insulator question: Q&A with Christophe Maleville, Soitec - DigiTimes
"Strained silicon techniques include both local and global approaches. With the local approach, strained silicon becomes part of the device architecture and is included in the CMOS process, whatever the SOI substrate or bulk wafer. The global approach is at the substrate level and is referred to as sSOI. If we combine silicon-on-insulator (SOI) and strained silicon techniques we can form strained SOI (sSOI) wafers, where a layer of strained silicon is transferred on insulator using the Smart Cut technique."
09/27/05 AMD waiting for sSOI to become manufacturable: New supplier JDP could resolve issues!
"SOI substrates have been proved in volume manufacturing at chip manufacturers such as IBM, Freescale and AMD. To further improve the inherent performance and/or low power consumption properties of SOI wafers, Soitec has been developing a layer-transfer strained SOI substrate that uses a silicon germanium alloy layer to add further carrier mobility.However, to eliminate a wide range of process induced faults, dislocations and general defects the SiGe material has to be completely removed. Work on this removal process has been ongoing for over 18 months we believe."
09/13/05 Soitec moves ahead in SOI - DigiTimes
"SOI currently represents some 3-4% of the total wafer market, and this is expected to rise to 10% by the end of the decade. Recent market research by Gartner Dataquest and Semicon Research Corp. indicates that the total SOI wafer market is expected to approach the US$1 billion mark by 2009."
01/17/05 Soitec Signs Multi-Year Agreement With AMD for the Supply of UNIBOND Soi Wafers
The Soitec Group today announced the signing of an agreement with AMD for a long-term supply of UNIBOND silicon-on-insulator (SOI) wafers. Under the terms of the multi-year agreement, projected to total more than $50 million for 2005 alone, Soitec will supply AMD with both 200- and 300mm SOI wafers, manufactured using Soitec's proprietary Smart Cut process. Soitec, the world's leading supplier of SOI and other engineered substrates, has been supplying AMD with volume quantities of thin-film UNIBOND SOI substrate solutions for the production of their most advanced microprocessors.
01/01/04 Implementation of CVD low-k dielectrics for high-volume production - Wafer News
12/10/04 Strained SOI 300mm Wafer Produced - Electronic News
"French wafer technology player Soitec and ASM, the Amsterdam-based substrate equipment company, claim to have produced the industry's first 'industrially manufactured' 300mm strained silicon-on-insulator (sSOI) wafers."
09/01/04 ZRAM reverses the economics of SOI - making cheaper chips
"Despite the convincing case to the contrary, Intel has been vocal about not supporting SOI, saying the benefits did not outweigh the costs (CIE May 2005]. With AMD's anticipated switch to ZRAM incurring not even the 15% SOI premium (since AMD is already on SOI), it now looks as though Intel might have shot itself in the foot by not adopting SOI early. There is more to their strategy than meets the eye, though."
05/26/04 UMC claims silicon on insulator breakthrough - the inquirer
"Direct Tunnelling is a quantum mechanical behaviour where electrons can jump through a thin insulator - while this is something chip makers usually don't want, UMC claims that its technique can take advantage of the effect to counteract what's called the Floating Body Effect. That's nothing to do with out of the body experiences, possibly."
01/22/04 IBM claims massive power cut for 90nm G5 - The Register
"That bodes well for AMD. Its 90nm processors are due later this year. Like the IBM chips, they too utilise SOI. IBM's success lends weight to the claim by American Technology Research analyst Rick Whittington that SOI will be crucial to AMD's transition to 90nm"
12/13/03 AMD’s Learning Curve on 130nm and 90nm SOI - Real World Technologies
"In session 11.1, AMD disclosed that its yield problems at the 130nm SOI process were due primarily to the integration of low-K materials into the process rather than SOI, as previously suspected. AMD chose to use hydrogenated silicon oxycarbide (SiCOH) for their low-K dielectrics, replacing fluorine-doped tetra-ethyl-ortho-silicate (FTEOS) as the dielectric material"
12/09/03 AMD Researchers Detail Future High-Speed Transistors with Record-Setting Performance
At the 2003 IEEE International Electron Devices Meeting (IEDM) in Washington, DC, AMD (NYSE:AMD) provided additional detail on its revolutionary next-generation silicon-on-insulator (SOI) transistor design, while also providing new information on its successful use of SOI technologies in its current microprocessors.
11/14/03 Silicon on insulator key to AMD 90nm success - analyst - The Register - Geek comments
"Whittington's line is that AMD's 90nm ramp is proving so successful, it should be able to ship 90nm Opterons ahead of schedule. As examples of that success, he cites demonstrations of 90nm Opterons that "did not appear to require extra cooling of any special change in the motherboard design". That, he believes, is a sign of the technologies maturity. So are the yields of 2.2 and 2.4GHz 90nm Opterons running at 45W - well below AMD's specified 70W operation. "
08/18/03 Soitec receives World Class Supplier Award from AMD
Soitec, the leading manufacturer of silicon-on-insulator (SOI) wafers for use in semiconductor manufacturing, today announced that it has received a World Class Supplier Spotlight Award from AMD in recognition of its overall SOI support and commitment to AMD. Soitec was awarded the honor due to its flexibility and superior customer service provided in a rapidly changing business environment, which enabled AMD to achieve its manufacturing objectives quickly and effectively. Soitec provides AMD with volume quantities of advanced thin-film UNIBOND SOI substrate solutions for the production of the AMD Opteron and upcoming AMD Athlon 64 processor products.
08/09/03 AMD's SOI is scary but good - the inquirer
"David Duarte, Vijaykrishnan Narayanan and Mary Jane Irwin did a bit of research on the subject at Penn State's CS department, which is the definitive guide for those of you that enjoy reading white papers that include both inscrutable mathematical formulas and easy to read graphs. If I got it wrong, please be gentle with your humble journo, as I only understood the pretty pictures"
07/04/03 Soitec announces customer cancels SOI wafers - the inquirer
"AMD had problems with its silicon on insulator die designs last year and at the beginning of this. When and if it moves to IBM Microelectronics, it doesn't need to worry too much because Big Blue's got its design and process facilities down pat."
04/08/03 Isonics Dives into Thin-Film SOI Market - ElectronicsNews
"The thin-film process, code-named Sigma-1, is built on Isonics' thick-film process and uses many of the same tools and equipment it already owns, reducing further capital investment, the company said"
03/07/03 Silicon Genesis Reports New Process for Strained SOI - Electronic News
"Dubbed Nanostrain, the process is based on the use of a single epitaxial reactor step to grow a graded silicon-germanium (SiGe) layer followed by a thermal relaxation step under a hydrogen and etchant gas ambient prior to a strained silicon epitaxial growth. The use of the gas-phase etchant ambient, SiGen said, substantially reduces the roughening and dislocation generation associated with SiGe relaxation utilizing thermal anneal steps"
01/08/03 AMD and IBM to Jointly Develop Advanced Chip Technologies
"AMD and IBM will be able to use the jointly-developed technologies to manufacture products in their own chip fabrication facilities and in conjunction with selected manufacturing partners. The companies expect first products based on the new 65nm technologies to appear in 2005"
12/09/02 IBM claims world's smallest silicon transistor - the inquirer
"The IBM transistor reduces the thickness of silicon on the silicon-on-insulator wafers it uses, with the body of the transistor only being between four to eight nanometers thick"
11/28/02 Isonics pushes ahead with SOI plans. AMD? - the inquirer
"The capacity for SOI wafers is 120,000 a year, and he said it had targeted 10 customers, seven of which had asked their names be kept confidential"
09/24/02 AMD Barton-core Athlon XP not using SOI process - DigiTimes
"AMD recently also clarified that its new Barton-core Athlon XP processors will not adopt SOI (silicon-on-insulator) processing technology as it previously planned"
09/23/02 Material innovations transform mainstream processor design - EETimes
"We were able to accomplish this significant advancement because SOI reduces total transistor capacitance 20 to 25 percent compared to bulk silicon, and enables reduced operating voltage. This technology is clearly positioned to improve the performance and decrease the power consumption of tomorrow's ICs"
08/06/02 TI opts for SOI for quality analogue - EETimes
06/12/02 Isonics in second round of AMD testing - the inquirer
06/10/02 Nurlogic Implements 4.8GHz PLL Into AMD's Eigth-Generation Processors
04/02/02 AMD's friend, Soitec wins bit of patent fight - the inquirer
12/11/01 AMD prepares for SOI processing in Dresden fab - ebnews
11/13/01 AMD buys 200mm wafers for Hammer - The Register
11/13/01 AMD orders SOI wafers for Hammer - the inquirer
05/04/01 The next step: SOI - tecchanel
12/13/00 Palomino chip runs fast and stays cool - vnunet
05/22/00 IBM taps new technology to build faster chips - CNET
06/18/99 IBM, Intel clash over benefits of SOI - EETimes
|AMD & Silicon-on-Insulator (SOI) Special|
IBM Low-K - IBM SOI
|"SOI technology improves performance over bulk CMOS technology by 25 to 35%, equivalent to two years of bulk CMOS advances. SOI technology also brings power use advantages of 1.7 to 3 times"
|Cross-section of a four layer metal SOI device.|
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